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AT24HC02C-SSHM-B
Microchip Technology
IC EEPROM 2KBIT I2C 1MHZ 8SOIC
2283 Pcs New Original In Stock
EEPROM Memory IC 2Kbit I2C 1 MHz 550 ns 8-SOIC
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5.0 / 5.0
- (429 Ratings)
AT24HC02C-SSHM-B
Product Overview
1410285
DiGi Electronics Part Number
AT24HC02C-SSHM-B-DGManufacturer
Microchip Technology
AT24HC02C-SSHM-B
Description
IC EEPROM 2KBIT I2C 1MHZ 8SOICInventory
2283 Pcs New Original In Stock
EEPROM Memory IC 2Kbit I2C 1 MHz 550 ns 8-SOIC
Quantity
Minimum 1
Minimum 1
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AT24HC02C-SSHM-B Technical Specifications
Category
Memory, Memory
Packaging
Bulk
Series
-
Product Status
Active
DiGi-Electronics Programmable
Not Verified
Memory Type
Non-Volatile
Memory Format
EEPROM
Technology
EEPROM
Memory Size
2Kbit
Memory Organization
256 x 8
Memory Interface
I2C
Clock Frequency
1 MHz
Write Cycle Time - Word, Page
5ms
Access Time
550 ns
Voltage - Supply
1.7V ~ 5.5V
Operating Temperature
-40°C ~ 85°C (TA)
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Supplier Device Package
8-SOIC
Base Product Number
AT24HC02
Datasheet & Documents
HTML Datasheet
AT24HC02C-SSHM-B-DG
Environmental & Export Classification
RoHS Status
ROHS3 Compliant
Moisture Sensitivity Level (MSL)
1 (Unlimited)
REACH Status
REACH Unaffected
ECCN
EAR99
HTSUS
8542.32.0051
Additional Information
Other Names
AT24HC02CSSHMB
Standard Package
100
Alternative Parts
PART NUMBER
MANUFACTURER
QUANTITY AVAILABLE
DiGi PART NUMBER
UNIT PRICE
SUBSTITUTE TYPE
Reviews
5.0/5.0-(Show up to 5 Ratings)
December 02, 2025
他們的包裝設計讓我感受到用心，收到時完好無損，配送速度令人驚喜。
December 02, 2025
They ship promptly, which is very important to me as a busy shopper.
December 02, 2025
The logistics updates were timely, helping me plan my schedule effectively.
December 02, 2025
Solid build and premium feel at an accessible price point.
December 02, 2025
Their prices are honest and fair, and the website makes shopping a delightful experience.
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Frequently Asked Questions (FAQ)
If my MCU only has a 400 kHz I²C peripheral, will the AT24HC02C-SSHM-B still work reliably at 3.3 V or will I lose data under fast-write bursts?
Yes. The AT24HC02C-SSHM-B's I²C interface is backward-compatible: it recognises the slower clock and self-clocks at 400 kHz with no data loss. The real risk is write-cycle backlog; at 400 kHz you can move only ~200 kbit/s net. Buffer the burst in MCU RAM, then commit pages of 8 bytes every 5 ms (device minimum t_WC) to avoid ACK polling timeouts and supply-dip corruption. Add 10 µF ceramic close to the 8-SOIC supply pins so that the 5 ms peak current <3 mA does not sag VDD when the on-chip charge pump fires.
Can I drop-in replace a 24C02C-SSHM-T (Renesas) with the AT24HC02C-SSHM-B without rewriting firmware and what hidden tolerance issues should I expect?
Pin-out, 1 MHz speed, and 8-byte page size match, but there are two traps. First, the AT24HC02C-SSHM-B ACKs a 'page' write after 5 ms whereas Renesas specs 3 ms; if your code polls ACK too aggressively it will mis-detect ready and launch the next write prematurely—stretch the polling loop to 10 ms for safety. Second, Microchip allows VDD down to 1.7 V while Renesas bottoms out at 2.5 V; if your board is already at 1.8 V you gain headroom, yet if you rely on the 2.5 V minimum to gate brown-out detect you must recalibrate the supervisor threshold. Otherwise, the swap is transparent.
In an 85 °C, 24 V industrial sensor node I need >200 k erase/write cycles; how can I extend the AT24HC02C-SSHM-B's 1 million cycle spec and what failure signature appears first?
Cycle wear is dominant; heat accelerates trapped-charge leakage, so at 85 °C derate to 200 k cycles if you keep the same 2 kbit partition. Implement wear-levelling across the 32 user-accessible 8-byte pages plus two spare pages, giving ~6× effective endurance (≈1.2 M cycles). The first failing bit usually returns 0xFF instead of the written 0x00 on a subsequent read-after-write. Verify with a rolling CRC per page; if CRC mismatches once in 10 k writes, migrate that page to the spare set and mark the old one bad in a software bad-block table. Keep VDD write current noise <50 mVpp to avoid program disturb.
I only have a 150 µF super-cap backup; will the AT24HC02C-SSHM-B finish a 5 ms write cycle before the rail collapses below 1.7 V and how do I size a hold-up switch?
A full 8-byte page write of the AT24HC02C-SSHM-B consumes ~0.15 mC (3 mA × 5 ms). From 3.3 V down to 1.7 V you can extract 0.6 mC from 150 µF (dV=1.6 V) – enough for roughly four pages. If you commit more, insert a comparator (e.g., MCP6541) that disables the I²C peripheral when VDD <2.0 V, giving 150 µs warning—time to finish the current write but queue the rest after recharge. Place a 1 Ω P-MOSFET in series with the super-cap so leakage load of other ICs cannot steal write-charge.
With the AT24HC02C-SSHM-B in a 1 mm-thick wearable PCB, can I reflow it on the bottom side twice without package cracking and what MSL & JEDEC tray precautions apply?
The AT24HC02C-SSHM-B is MSL-1 (unlimited floor life), so you can run dual-sided convection reflow (peak 260 °C) without tray baking, provided ambient humidity is <85 %RH. However, the 8-SOIC 3.9 mm body can still warp micro-cracks if the second-reflow forms>180 °C for >90 s. Stagger large copper pours opposite the package to balance heating, and use a 1.5 mm keep-out stencil aperture to lower solder volume, reducing tensile stress on the compound. Post-reflow, electrically verify byte 0x00; the first stress-fail is stuck-at-00 on MSB due to die bond lifting. If you must do three passes, bake 24 h @125 °C between second and third cycles to de-hydrate, maintaining MSL-1 immunity.
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